A typical non-volatile semiconductor memory device, in which contents are electrically programmable and simultaneously erased by one operation (hereinafter it is called "flash memory"), includes a plurality of memory cells each provided with a floating gate covered with an insulation layer.
In such a flash memory, charges are injected to a floating gate by an avalanche breakdown or channeling so that a threshold voltage of the memory cell is raised to write a predetermined data therein. On the other hand, charges are removed from a floating gate of a memory cell by a tunnel effect between the floating gate and a source or a substrate of the memory cell in order to erase a data stored in the memory cell.
In such a flash memory, a threshold value of a memory cell may become negative by an over-erasing, so that the memory cell is constantly conductive. Consequently, all of memory cells connected to a bit line common to the conductive memory cell become constantly conductive.
Accordingly, some kinds of flash memories with a function for inspecting erasing condition have been proposed. In a first conventional flash memory, each floating gate of memory cell is injected with charges of predetermined amount before erasing operation to uniform charged condition of the memory cells. Then, an erasing voltage is applied to each memory cell for a time shorter than a time which is required to erase data in the memory cell. After that, an erase check voltage, for example 3.2 V voltage generated by dropping an external voltage, is applied to a gate of each memory cell to inspect whether or not data has been erased from the memory cell. The operation of erasing and inspection is repeated until data are erased from all the memory cells completely.
According to the first conventional flash memory, however, there is a disadvantage in that some of memory cells may be over-erased due to non uniformity of erasing speed among the memory cells when data written in all the memory cells are simultaneously erased. As a result, the flash memory can not operate normally.
A second conventional flash memory includes a memory region divided into plural blocks each composed of plural memory cells. According to the second conventional flash memory, non uniformity of erasing speed among the memory cells is decreased. However, it is required that erasing operation is repeated by times corresponding to the number of the memory cell blocks in order to erase data stored in all memory cells of the flash memory. As a result, the erasing time becomes long totally.